Plcc

It's a Long Way to the Memory Top, Part II

This one really is a tough one to debug. At first, we suspected the VHDL code for the CPLD as the main error source, as VHDL is not our strongest suit. In fact, the decoder/banking logic is the first thing we ever really did in VHDL (apart from a few simple decoder equations the first days we were playing with GALs). As it turned out, the VHDL was not the main problem.

It's a Long Way to the Memory Top

In preparation for the build of our new CPU-Board, we purchased two WDC 65c02 in PLCC44 package from some eBay vendor. On arrival, the first interesting thing is the way they were packaged. No anti esd packaging, only a plastic bag, which we found sketchy enough to post on Twitter. Next, WDC reacted to that tweet, stating that these might be not genuine or be at least very old. {{/< tweet user=“steckschwein” id=“1532446031127904256” >/}}