Spi

We are going back to breadboarding for designing what will be the base for the new Steckschwein computer core. By “core” we mean CPU, RAM, ROM and the glue logic which will be accommodated in the ATF1508 CPLD. In order to communicate with the outside word, we also count the 16C550 UART as part of the core.

Design goals

Our main design goals are:

• Integrate SPI into the CPLD -> DONE
  Using a hardware based SPI implementation similiar to Daryl Rictor’s SPI65, but tightly integrated into the CPLD will be an efficient use of the CPLD resources and will provide a much more performant SPI bus as opposed to the current semi-bit-banged solution. This way, it will be much more performant to add more SPI based components such as USB host or networking (see below).
  Update: Done! We decided to use Andre Fachat’s SPI implementation from his MicroPET. The main advantage over rolling our own is - it’s already there. Another main advantage over other existing Implementation is that the MicroPET one is pretty small, which is important when CPLD resources are at a premium.
• Implement a priorising vectorising interrupt controller
  This will improve interrupt handling by assigning a dedicated ISR routine per interrupt source instead of one system ISR.

Other changes/optimizations

Other things that will be optimized are:

The way the PS/2 keyboard is handled has always been something we were never quite happy with. The key points being:

• The PS/2 controller had no way of signalling that there has been a new keystroke, the buffer had to be polled via SPI.
• The PS/2 controller had no way of talking to the keyboard and had to rely for the keyboard to initialize itself properly. Also, typematic rate and delay could not be set, as couldn’t the states of the keyboard LEDs.

Although mid- to long term, we likely might “upgrade” to USB anyway, but not without having done PS/2 right first. So, I will talk about integrating IRQ handling, and in a follow up post Marko will talk about how he got the PS/2 controller talking to the keyboard.

Frank van den Hoef, who is adapting the Steckschwein SPI & FAT32 code for his tiny65 machine made me aware of a classic mistake for a 6502 assembly coder to make. Namely in our sdcard driver, when waiting for the “proper” response from the card (which should have bit 7 cleared). The routine handling this looked like this:

1  sd_cmd_response_wait:
2 	ldy #sd_cmd_response_retries
3 @l:	dey
4         beq sd_block_cmd_timeout ; y already 0? then invalid response or timeout
5         jsr spi_r_byte
6         bit #80	; bit 7 clear
7         bne @l  ; no, next byte
8         cmp #$00 ; got cmd response, check if $00 to set z flag accordingly
9         rts
10 sd_block_cmd_timeout:
11        debug "sd_block_cmd_timeout"
12        lda #$1f ; make up error code distinct from possible sd card responses to mark timeout
13        rts

Classic. Obviously, line 6 should read: